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FUJITSU SEMICONDUCTOR DATA SHEET
DS04-29116-2E
Spread Spectrum Clock Generator
MB88151
DESCRIPTION
MB88151 is a clock generator for EMI (Electro Magnetic Interference) reduction. The peak of unnecessary radiation noise (EMI) can be attenuated by making the oscillation frequency slightly modulate periodically with the internal modulator. It corresponds to both of the center spread which modulates frequency in modulation off as Middle Centered and down spread which modulates so as not to exceed frequency in modulation off.
FEATURES
* * * * * * Input frequency : 16.6 MHz to 33.4 MHz Multiplication rate : 1/2, 1, 2, 4 Output frequency : 8.3 MHz to 16.7 MHz, 16.6 MHz to 33.4 MHz, 33.3 MHz to 66.7 MHz, 66.6 MHz to 133.4 MHz Modulation rate : 0.5%, 1.5% (Center spread), - 1.0%, - 3.0% (Down spread) Equipped with oscillation circuit : Range of oscillation 16.6 MHz to 33.4 MHz Modulation clock output Duty : 40% to 60% (Continued)
PACKAGE
8-pin plastic SOP
(FPT-8P-M02)
MB88151
(Continued) * Modulation clock Cycle-Cycle Jitter MB88151-100, 200 : Less than 100 ps MB88151-400 : Less than 150 ps MB88151-500 : Less than 200 ps * Low current consumption by CMOS process : 5 mA (24 MHz : Typ-sample, no load) * Power supply voltage : 3.3 V 0.3 V * Operating temperature : - 40 C to + 85 C * Package : SOP 8-pin
PRODUCT LINEUP
MB88151 has four kinds of multiplication type. Product Input frequency range MB88151-100 MB88151-200 MB88151-400 MB88151-500 16.6 MHz to 33.4 MHz Multiplier ratio Multiplied by 1 Multiplied by 2 Multiplied by 4 Multiplied by 1/2 Output frequency range 16.6 MHz to 33.4 MHz 33.3 MHz to 66.7 MHz 66.6 MHz to 133.4 MHz 8.3 MHz to 16.7 MHz
PIN ASSIGNMENT
TOP VIEW
XIN 1 VSS 2 SEL0 3 SEL1 4 MB88151
8 XOUT 7 VDD 6 ENS 5 CKOUT
FPT-8P-M02
PIN DESCRIPTION
Pin name XIN VSS SEL0 SEL1 CKOUT ENS VDD XOUT 2 I/O I I I O I O Pin no. 1 2 3 4 5 6 7 8 GND pin Modulation rate setting pin Modulation rate setting pin Modulated clock output pin Modulation enable setting pin (with pull-up resistance) Power supply voltage pin Resonator connection pin Description Resonator connection pin/clock input pin
MB88151
I/O CIRCUIT TYPE
Pin Circuit type Remarks * CMOS hysteresis input
SEL0 SEL1
* CMOS hysteresis input with pull-up resistor 50 k (Typ)
50 k
ENS
* CMOS output * IOL = 4 mA
CKOUT
Note : For XIN and XOUT pins, see "OSCILLATION CIRCUIT".
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MB88151
HANDLING DEVICES
Preventing Latchup A latchup can occur if, on this device, (a) a voltage higher than VDD or a voltage lower than VSS is applied to an input or output pin or (b) a voltage higher than the rating is applied between VDD and VSS. The latchup, if it occurs, significantly increases the power supply current and may cause thermal destruction of an element. When you use this device, be very careful not to exceed the maximum rating. Handling unused pins Do not leave an unused input pin open, since it may cause a malfunction. Handle by, using a pull-up or pull-down resistor. Unused output pin should be opened. The attention when the external clock is used Input the clock to XIN pin, and XOUT pin should be opened when you use the external clock. Please pay attention so that an overshoot and an undershoot do not occur to an input clock of XIN pin. Power supply pins Please design connecting the power supply pin of this device by as low impedance as possible from the current supply source. We recommend connecting electrolytic capacitor (about 10 F) and the ceramic capacitor (about 0.01 F) in parallel between VSS and VDD near the device, as a bypass capacitor. Oscillation circuit Noise near the XIN and XOUT pins may cause the device to malfunction. Design printed circuit boards so that electric wiring of XIN or XOUT pin and the resonator do not intersect other wiring. Design the printed circuit board that surrounds the XIN and XOUT pins with ground.
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MB88151
BLOCK DIAGRAM
VDD
SEL1
Modulation rate setting Modulation rate setting
SEL0
PLL block
ENS
Modulation enable setting
Clock output
CKOUT
XOUT
Reference clock
XIN
Rf = 1 M
VSS
1 - M
Phase compare Charge pump V/I conversion
IDAC
ICO
Reference clock
1 - N
Loop filter
Modulation clock output
1 - L
Modulation logic
Modulation rate setting/ Modulation enable setting
MB88151 PLL block A glitchless IDAC (current output D/A converter) provides precise modulation, thereby dramatically reducing EMI. 5
MB88151
PIN SETTING
When changing the pin setting, the stabilization wait time for the modulation clock is required. The stabilization wait time for the modulation clock take the maximum value of " ELECTRICAL CHARACTERISTICS * AC characteristics Lock-Up time". ENS modulation enable setting ENS L H
Modulation No modulation Modulation
Note : Spectrum does not spread when "L" is set to ENS. The clock with low jitter can be obtained. Because of ENS has Pull-up resistance, spectrum spread when "H" is set to it or open the terminal. SEL0, SEL1 Modulation rate setting SEL1 SEL0 L L H H L H L H
Modulation rate 1.5% 0.5% - 1.0% - 3.0%
Modulation type Center spread Center spread Down spread Down spread
Note : The modulation rate can be changed at the level of the terminal. * Center spread Spectrum is spread (modulated) by centering on the frequency in modulation off.
Radiation level
Modulation width 3.0%
-1.5%
+1.5%
Frequency Frequency in modulation off Center spread example of 1.5% modulation rate
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MB88151
* Down spread Spectrum is spread (modulated) below the frequency in modulation off. Modulation width 3.0% Radiation level
-3.0%
Frequency Frequency in modulation off Down spread example of - 3.0% modulation rate
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MB88151
ABSOLUTE MAXIMUM RATINGS
Parameter Power supply voltage* Input voltage* Output voltage* Storage temperature Operation junction temperature Output current Overshoot Undershoot Symbol VDD VI VO TST TJ IO VIOVER VIUNDER Rating Min - 0.5 VSS - 0.5 VSS - 0.5 - 55 - 40 - 14
Max + 4.0 VDD + 0.5 VDD + 0.5 + 125 + 125 + 14 VDD + 1.0 (tOVER 50 ns)
Unit V V V C C mA V V
VSS-1.0 (tUNDER 50 ns)
* : The parameter is based on VSS = 0.0 V. WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
Overshoot/Undershoot
tUNDER 50 ns VIOVER VDD + 1.0 V
VDD
Input pin
VSS
tOVER 50 ns
VIUNDER VSS - 1.0 V
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MB88151
RECOMMENDED OPERATING CONDITIONS
(VSS = 0.0 V) Parameter Power supply voltage "H" level input voltage "L" level input voltage Input clock duty cycle Operating temperature Symbol VDD VIH VIL tDCI Ta Pin VDD XIN, SEL0, SEL1, ENS XIN Conditions 16.6 MHz to 33.4 MHz Value Min 3.0 VDD x 0.80 VSS 40 - 40 Typ 3.3 50 Max 3.6 VDD + 0.3 VDD x 0.20 60 + 85 Unit V V V % C
WARNING: The recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. All of the device's electrical characteristics are warranted when the device is operated within these ranges. Always use semiconductor devices within their recommended operating condition ranges. Operation outside these ranges may adversely affect reliability and could result in device failure. No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their FUJITSU representatives beforehand.
Input clock duty cycle (tDCI = tb/ta)
ta tb CKIN 1.5 V
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MB88151
ELECTRICAL CHARACTERISTICS
* DC Characteristics (Ta = - 40 C to + 85 C, VDD = 3.3 V 0.3 V, VSS = 0.0 V) Parameter Symbol Pin Conditions No load capacitance at output 24 MHz MB88151-100 "H" level output, IOH = - 4 mA "L" level output, IOL = 4 mA Value Min VDD - 0.5 VSS 25 Typ 5.0 45 50 Max 7.0 Unit
Power supply current
ICC
VDD
mA
VOH Output voltage VOL Output impedance ZO CKOUT
VDD 0.4 16
V V pF
CKOUT 8.3 MHz to 133.4 MHz XIN, SEL0, SEL1, ENS Ta = + 25 C, VDD = VI = 0.0 V, f = 1 MHz 8.3 MHz to 66.7 MHz
Input capacitance
CIN
15 10 7 200 k pF
Load capacitance Input pull-up resistance
CL RPU
CKOUT 66.7 MHz to 100 MHz 100 MHz to 133.4 MHz ENS VIL = 0.0 V
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MB88151
* AC Characteristics (Ta = - 40 C to + 85 C, VDD = 3.3 V 0.3 V, VSS = 0.0 V) Parameter Oscillation frequency Input frequency Symbol fx fin Pin XIN, XOUT XIN Conditions Fundamental oscillation External clock input MB88151-100 (Multiply by 1) MB88151-200 (Multiply by 2) MB88151-400 (Multiply by 4) MB88151-500 (2-frequency division) Output slew rate Output clock duty cycle Modulation frequency Lock-Up time SR tDCC fMOD tLK CKOUT CKOUT CKOUT CKOUT 0.4 V to 2.4 V Load capacitance 15 pF 1.5 V MB88151-100, 200 No load capacitance, Ta = + 25 C, VDD = 3.3 V, Standard deviation MB88151-400 No load capacitance, CKOUT Ta = + 25 C, VDD = 3.3 V, Standard deviation MB88151-500 No load capacitance, Ta = + 25 C, VDD = 3.3 V, Standard deviation Value Min 16.6 16.6 16.6 33.3 66.6 8.3 0.4 40 Typ 12.5 2 Max 33.4 33.4 33.4 66.7 MHz 133.4 16.7 4.0 60 5 V/ns % kHz ms Unit MHz MHz
Output frequency
fOUT
CKOUT
100
Cycle-cycle jitter
tJC
150
ps
200
Note : The modulation clock stabilization wait time is required after the power is turned on, the IC recovers from power saving, or after FREQ (frequency range) or ENS (modulation ON/OFF) setting is changed. For the modulation clock stabilization wait time, assign the maximum value for lock-up time.
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MB88151
OUTPUT CLOCK DUTY CYCLE (tDCC = tb/ta)
ta tb 1.5 V CKOUT
INPUT FREQUENCY (fin = 1/tin)
tin
0.8 VDD CKIN
OUTPUT SLEW RATE (SR)
2.4 V CKOUT tr tf 0.4 V
Note : SR = (2.4 - 0.4) /tr, SR = (2.4 - 0.4) /tf
CYCLE-CYCLE JITTER (tJC = | tn - tn+1 |)
CKOUT tn tn+1
Note : Cycle-cycle jitter is defined the difference between a certain cycle and immediately after (or, immediately before) .
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MB88151
MODULATION WAVEFORM
* 1.5% modulation rate, Example of center spread CKOUT output frequency
+ 1.5 %
Frequency at modulation OFF Time
- 1.5 %
fMOD = 12.5 kHz (Typ)
* -1.0% modulation rate, Example of down spread CKOUT output frequency Frequency at modulation OFF Time
- 0.5 %
- 1.0 %
fMOD = 12.5 kHz (Typ)
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MB88151
LOCK-UP TIME
3.0 V
Internal clock stabilization wait tim
VDD
XIN
Setting pin SEL0, SEL1, ENS
CKOUT
VIH
tLK (lock-up time )
If the setting pin is fixed at the "H" or "L" level, the maximum time after the power is turned on until the set clock signal is output from CKOUT pin is (the stabilization wait time of input clock to XIN pin) + (the lock-up time "tLK"). For the input clock stabilization time, check the characteristics of the resonator or oscillator used.
XIN
ENS
VIH VIL
tLK (lock-up time ) tLK (lock-up time )
CKOUT
For modulation enable control using the ENS pin during normal operation, the set clock signal is output from CKOUT pin at most the lock-up time (tLK) after the level at the ENS pin is determined. Note : When the pin setting is changed, the CKOUT pin output clock stabilization time is required. Until the output clock signal becomes stable, the output frequency, output clock duty cycle, modulation period, and cyclecycle jitter cannot be guaranteed. It is therefore advisable to perform processing such as cancelling a reset of the device at the succeeding stage after the lock-up time.
14
MB88151
OSCILLATION CIRCUIT
The figure below shows the connection example about general resonator. The oscillation circuit has the built-in resistance (1 M) . The value of capacity (C1 and C2) is required adjusting to the most suitable value of individual resonator. The most suitable value is different by individual resonator. Please refer to the resonator manufacturer which you use for the most suitable value. Input the clock to XIN pin, and do not connect anything with XOUT pin if you use the external clock (you do not use the resonator). * When using the resonator
LSI Internal
Rf (1 M)
XIN Pin
XOUT Pin LSI External
C1
C2
* When using an external clock
LSI Internal
Rf (1 M)
XIN Pin XOUT Pin
LSI External External clock
OPEN
Note :
Note that a jitter characteristic of an input clock may cause an affect a cycle-cycle jitter characteristic.
15
MB88151
INTERCONNECTION CIRCUIT EXAMPLE
C1 Xtal
C2
1 2 SEL0 3 4 SEL1 MB88151
8 7 6 5 R1 + ENS
C4
C3
C1, C2 C3 C4 R1
: Oscillation stabilization capacitance (see "OSCILLATION CIRCUIT".) : Capacitor of 10 F or higher : Capacitor about 0.01 F (connect a capacitor of good high frequency property (ex. laminated ceramic capacitor) to close to this device) : Impedance matching resistor for board pattern
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MB88151
SPECTRUM EXAMPLE CHARACTERISTICS
The condition of the examples of the characteristic is shown as follows : Input frequency = 20 MHz (Output frequency = 20 MHz : Using MB88151-100 (Multiply by 1)), Power - supply voltage = 3.3 V, None load capacity, Modulation rate = 1.5% (center spread). Spectrum analyzer HP4396B is connected with CKOUT. The result of the measurement with RBW = 1 kHz (ATT use for - 6dB).
CH B Spectrum
10 dB /REF 0 dBm
No modulation -6.54 dBm
Avg 4
1.5% modulation -24.45 dBm
RBW# 1 kHZ VBW 1 kHZ CENTER 20 MHZ
ATT 6 dB
SWP 2.505 s SPAN 4 MHZ
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MB88151
ORDERING INFORMATION
Part number
MB88151PNF-G-100-JNE1 MB88151PNF-G-200-JNE1 MB88151PNF-G-400-JNE1 MB88151PNF-G-500-JNE1 MB88151PNF-G-100-JN-EFE1 MB88151PNF-G-200-JN-EFE1 MB88151PNF-G-400-JN-EFE1 MB88151PNF-G-500-JN-EFE1 MB88151PNF-G-100-JN-ERE1 MB88151PNF-G-200-JN-ERE1 MB88151PNF-G-400-JN-ERE1 MB88151PNF-G-500-JN-ERE1 16.6 MHz to 33.4 MHz
Input frequency range
Multiplier ratio
Output frequency range
Package
Remarks
Multiplied by 1 16.6 MHz to 33.4 MHz 8-pin plastic Multiplied by 2 33.3 MHz to 66.7 MHz SOP Multiplied by 4 66.6 MHz to 133.4 MHz (FPT-8P-M02) Multiplied by 1/2 8.3 MHz to 16.7 MHz Multiplied by 1 16.6 MHz to 33.4 MHz 8-pin plastic Emboss Multiplied by 2 33.3 MHz to 66.7 MHz SOP taping Multiplied by 4 66.6 MHz to 133.4 MHz (FPT-8P-M02) (EF type) Multiplied by 1/2 8.3 MHz to 16.7 MHz Multiplied by 1 16.6 MHz to 33.4 MHz 8-pin plastic Emboss Multiplied by 2 33.3 MHz to 66.7 MHz taping SOP Multiplied by 4 66.6 MHz to 133.4 MHz (FPT-8P-M02) (ER type) Multiplied by 1/2 8.3 MHz to 16.7 MHz
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MB88151
PACKAGE DIMENSION
8-pin plastic SOP (FPT-8P-M02)
+0.25 +.010
Note 1) *1 : These dimensions include resin protrusion. Note 2) *2 : These dimensions do not include resin protrusion. Note 3) Pins width and pins thickness include plating thickness. Note 4) Pins width do not include tie bar cutting remainder.
0.22 -0.07 .009 -.003
5
+0.03 +.001
*1 5.05 -0.20 .199 -.008
8
*2 3.900.30 6.000.40 (.154.012) (.236.016)
Details of "A" part 45 1.550.20 (Mounting height) (.061.008) 0.25(.010)
0.40(.016)
1 4
"A"
0~8
1.27(.050)
0.440.08 (.017.003)
0.13(.005)
M
0.500.20 (.020.008) 0.600.15 (.024.006)
0.150.10 (.006.004) (Stand off)
0.10(.004)
C
2002 FUJITSU LIMITED F08004S-c-4-7
Dimensions in mm (inches) Note: The values in parentheses are reference values.
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MB88151
FUJITSU LIMITED
All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before ordering. The information, such as descriptions of function and application circuit examples, in this document are presented solely for the purpose of reference to show examples of operations and uses of Fujitsu semiconductor device; Fujitsu does not warrant proper operation of the device with respect to use based on such information. When you develop equipment incorporating the device based on such information, you must assume any responsibility arising out of such use of the information. Fujitsu assumes no liability for any damages whatsoever arising out of the use of the information. Any information in this document, including descriptions of function and schematic diagrams, shall not be construed as license of the use or exercise of any intellectual property right, such as patent right or copyright, or any other right of Fujitsu or any third party or does Fujitsu warrant non-infringement of any third-party's intellectual property right or other right by using such information. Fujitsu assumes no liability for any infringement of the intellectual property rights or other rights of third parties which would result from the use of information contained herein. The products described in this document are designed, developed and manufactured as contemplated for general use, including without limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured as contemplated (1) for use accompanying fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect to the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in weapon system), or (2) for use requiring extremely high reliability (i.e., submersible repeater and artificial satellite). Please note that Fujitsu will not be liable against you and/or any third party for any claims or damages arising in connection with above-mentioned uses of the products. Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. If any products described in this document represent goods or technologies subject to certain restrictions on export under the Foreign Exchange and Foreign Trade Law of Japan, the prior authorization by Japanese government will be required for export of those products from Japan.
F0502 (c) 2005 FUJITSU LIMITED Printed in Japan

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